Dear all, I am trying to configure the MPC5121 to perform DMA transfers from the CPU RAM to the RAM of an FPGA attached on ChipSelect 2. I have to use the LocalPlus Bus and configure the chipselect2 for bust mode and non-multiplexed. I also have to configure a DMA task to copy the content of my buffer to the local bus Fifo and then kick this content to the wanted address on chipselect 2. I have some code (thanks to Grant Likely) to implement a LocalPlus Bus Fifo driver (SCPLC) but have no clue how to configure the DMA for using the SCPLC... Can someone help me?? The 5121 fifo is directly derived from the 5200 fifo, only it is : * deeper (1024bytes instead of 512), * up to 56 bytes can be transfered with one transaction * increased SCPLC packet size register to 31 bits best regards, Jean-Philippe Jacquemin
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