and what settings is DMA description bit 3?
> -----Original Message----- > From: linuxppc-dev-bounces+daveliu=freescale....@ozlabs.org > [mailto:linuxppc-dev-bounces+daveliu=freescale....@ozlabs.org] > On Behalf Of Liu Dave-R63238 > Sent: Friday, March 06, 2009 1:22 PM > To: Ben Menchaca; linuxppc-dev@ozlabs.org > Subject: RE: 83xx: Marking or Allocating Pages as Cache-Inhibited > > Did you enable the snoop bit at PEX_WDMA_CTRL[SNOOP] and > PEX_RDMA_CTRL[SNOOP]? > > What is the freq settings? CORE/CSB bus. > > Thanks, Dave > > ________________________________ > > From: linuxppc-dev-bounces+daveliu=freescale....@ozlabs.org > [mailto:linuxppc-dev-bounces+daveliu=freescale....@ozlabs.org] > On Behalf Of Ben Menchaca > Sent: Friday, March 06, 2009 12:33 PM > To: linuxppc-dev@ozlabs.org > Subject: 83xx: Marking or Allocating Pages as Cache-Inhibited > > > I am working on a Freescale 8314e design, and the > embedded device is configured as a PCI-e endpoint running a > 2.6.27-5 kernel. For context, we have written a kernel > module which, among other things, uses the RDMA/WDMA engine > in the PCI-e IP block. On the host side, these DMAs are > coherent. However, on the embedded side, things are quite a > bit less rosy; we must manually flush/invalidate cache lines > for WDMA/RDMAs to occur successfully. After speaking with > (several) FAEs at Freescale, we believe there is a > configuration issue that is the cause, but we have yet to > have anyone successfully point to it. > > Disabling the data cache altogether resolves the issue > entirely, but of course, also completely tanks performance. > As a temporary workaround, I would like to simply mark the > pages (obtained currently via dma_alloc_coherent) involved as > cache-inhibited. I have attempted to do this via some > snippets remaining in fec.c (va_to_pte, uncache_pte to set > _PAGE_NO_CACHE, flush_tlb_page, then unmap_pte), but this is > almost certainly braindead; va_to_pte is not a part of the > 83xx source, as far as I can tell; 8xx only. > > A quick pointer in the correct direction for marking > pages as cache-inhibited on a 2.6.27-5 kernel would be > appreciated, or if my approach to a workaround is flawed, a > pointer to the correct way would be great. > > Ben Menchaca > > > _______________________________________________ > Linuxppc-dev mailing list > Linuxppc-dev@ozlabs.org > https://ozlabs.org/mailman/listinfo/linuxppc-dev > > _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
