On Wed, Jan 21, 2009 at 06:37:32PM +1100, Daniel Ng wrote:
> I think the of_get_gpio() error messages are a result of the following
> code in cpm_uart_init_port()-
>
> for (i = 0; i < NUM_GPIOS; i++)
> pinfo->gpios[i] = of_get_gpio(np, i);
>
> -why is this code here? Is it for processing modem control lines?
Yes.
> I know our board doesn't make use of the modem control lines for
> ttyCPM0. Therefore, have I misconfigured something in the Device Tree?
No, those are just not-found errors from the code that is checking the
device tree to see if the control lines are there or not. It's harmless.
> b...@119f0 {
> compatible = "fsl,mpc8272-brg",
> "fsl,cpm2-brg",
> "fsl,cpm-brg";
> reg = <0x119f0 0x10 0x115f0 0x10>;
> };
Is clock-frequency getting filled in?
Note that there's another thread about this exact issue;
see "[MPC8272ADS]Cannot start my Linux Kernel".
> Would you please explain what the following lines mean, so I can use
> some more appropriate values for my particular board?-
>
> 1) In the ser...@11a00 node-
>
> a) reg = <0x11a00 0x20 0x8000 0x100>;
IMMR offset and length of the SCC1 registers, followed by offset and
length of the parameter RAM registers.
> b) interrupts = <40 8>;
Interrupt number, followed by level/sense information (see
dts-bindings/fsl/cpm_qe/cpm/pic.txt).
> c) fsl,cpm-brg = <1>;
BRG number that this serial port uses.
> d) fsl,cpm-command = <0x800000>;
Value to put in the CPM command register for SCC1.
> 2) In the b...@119f0 node-
> reg = <0x119f0 0x10 0x115f0 0x10>;
Offset and length of two blocks of BRG registers.
> 3) In the PIC: interrupt-control...@10c00 node-
> reg = <0x10c00 0x80>;
Offset and length of PIC registers.
> I have read the relevant documentation under Documentation/powerpc and
> Documentation/powerpc/dts-bindings, but these do not seem to go into
> enough detail eg.
> Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/brg.txt says the
> following about the reg property-
>
> - reg : There may be an arbitrary number of reg resources; BRG
> numbers are assigned to these in order.
>
> -> does this mean that each number represents a BRG register? So there
> can be a maximum of 1+8=9 reg values, since there are 8 BRG registers?
No, there can be multiple BRGs per register block.
> As for Documentation/powerpc/dts-bindings/fsl/cpm_qe/serial.txt, there
> is no explanation at all for what the 'reg', 'interrupts', 'brg' and
> 'command' values mean... Am I missing something obvious?
brg and command are defined in dts-bindings/fsl/cpm_qe/cpm.txt. reg and
interrupts are standard properties that are defined in
Documentation/powerpc/booting-without-of.txt, as well as in the ePAPR
document.
The device-specific bindings are only meant to explain things that are
specific to that device, not things that are common to all device trees.
> Similarly for Documentation/powerpc/dts-bindings/fsl/cpm_qe/pic.txt,
> there is no explanation of the 'reg' value. Also, it mentions a
> 'second interrupt cell' but I only see one in the example it gives.
> Here is what it says-
The example is of the interrupt controller node, not of an interrupt
underneath it. There are no interrupt cells in that node, but
#interrupt-cells *is* 2.
> Does the level/sense refer to ALL interrupts?
I don't follow. Interrupt specifiers have the second cell if, and only
if, the interrupt controller has #interrupt-cells = <2>. For PQ2, that
is the case.
-Scott
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