Commit 18404756765c713a0be4eb1082920c04822ce588 introduced a regression on a subset of SMP based PPC systems whose interrupt controller only allow setting an irq to a single processor. The previous behavior was only CPU0 was initially setup to get interrupts. Revert back to that behavior.
Signed-off-by: Kumar Gala <[EMAIL PROTECTED]> --- kernel/irq/manage.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index c498a1b..728d36a 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c @@ -17,7 +17,7 @@ #ifdef CONFIG_SMP -cpumask_t irq_default_affinity = CPU_MASK_ALL; +cpumask_t irq_default_affinity = CPU_MASK_CPU0; /** * synchronize_irq - wait for pending IRQ handlers (on other CPUs) -- 1.5.5.1 _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
