On 18/02/26 2:57 am, Niklas Cassel wrote:
Hello all,

This series is written in response to the patch series from
Manikanta Maddireddy that was posted here:
https://lore.kernel.org/linux-pci/[email protected]/T/#t

The reasons why I decided to post this a new series was because the series
above:

1) Adds PCI device and vendor specific code to
drivers/misc/pci_endpoint_test.c. We've worked hard to make sure that
device specific quirks/limitations are communicated via the Capabilities
register, so let's do the same for reserved BARs.

2) My review comment which suggested to convert all uses of BAR_RESERVED
to BAR_DISABLED (except for pci-keystone.c) was ignored.

3) Koichiro has posted a series that allows an EPC driver to define exactly
which hardware backed resources are provided in a BAR_RESERVED BAR. Yet,
this nice improvement was not incorporated. (While Mankata was part of the
discussion, he was not CC:d on the patches that actually implemented this.)

4) The selftests should return skip instead of silent success for a
reserved BAR.

5) As Mankata points out, but did not address, BAR_RESERVED is quite
ambiguous, so it is better to introduce a new BAR_64BIT_UPPER to more
clearly mark the upper part of a 64-bit BAR as this, rather than reuse
BAR_RESERVED.

6) It is possible to remove all the dw_pcie_ep_reset_bar() calls in the
DWC based glue drivers and move it to DWC common code.


Because of all of the above, I thought it was just easier to post a series
with all of the above addressed, as it seemed easier to just show what I
meant rather than to try to explain things with words.

The thing that is missing is to add a patch for pcie-tegra194.c which
converts the BARs to BAR_RESERVED.
Please see patch "PCI: dw-rockchip: Describe RK3588 BAR4 DMA ctrl window"
and do something similar to pcie-tegra194.c.

If we are missing some resources (right now we only have
PCI_EPC_BAR_RSVD_DMA_CTRL_MMIO), then I think we should simple add that
(e.g. PCI_EPC_BAR_RSVD_MSIX).

Mankata, it would be nice if you could test this series, and if you could
provide a pcie-tegra194.c patch that adds the sizes of the eDMA regs +
MSI-X table in BAR_2 and BAR_4.


Kind regards,
Niklas


Koichiro Den (2):
   PCI: endpoint: Describe reserved subregions within BARs
   PCI: dw-rockchip: Describe RK3588 BAR4 DMA ctrl window

Niklas Cassel (7):
   PCI: endpoint: Introduce pci_epc_bar_type BAR_64BIT_UPPER
   PCI: endpoint: Introduce pci_epc_bar_type BAR_DISABLED
   PCI: dwc: Replace BAR_RESERVED with BAR_DISABLED in glue drivers
   PCI: dwc: Disable BARs in common code instead of in each glue driver
   PCI: endpoint: pci-epf-test: Advertise reserved BARs
   misc: pci_endpoint_test: Give reserved BARs a distinct error code
   selftests: pci_endpoint: Skip reserved BARs

  drivers/misc/pci_endpoint_test.c              | 32 ++++++++++++-
  drivers/pci/controller/dwc/pci-dra7xx.c       |  4 --
  drivers/pci/controller/dwc/pci-imx6.c         | 22 +++------
  .../pci/controller/dwc/pci-layerscape-ep.c    |  8 +---
  drivers/pci/controller/dwc/pcie-artpec6.c     |  4 --
  .../pci/controller/dwc/pcie-designware-ep.c   | 24 ++++++++++
  .../pci/controller/dwc/pcie-designware-plat.c | 10 -----
  drivers/pci/controller/dwc/pcie-dw-rockchip.c | 19 +++++---
  drivers/pci/controller/dwc/pcie-keembay.c     |  6 +--
  drivers/pci/controller/dwc/pcie-qcom-ep.c     | 14 +-----
  drivers/pci/controller/dwc/pcie-rcar-gen4.c   | 16 ++-----
  drivers/pci/controller/dwc/pcie-stm32-ep.c    | 10 -----
  drivers/pci/controller/dwc/pcie-tegra194.c    | 20 +++------
  drivers/pci/controller/dwc/pcie-uniphier-ep.c | 24 +++-------
  drivers/pci/controller/pcie-rcar-ep.c         |  6 +--
  drivers/pci/endpoint/functions/pci-epf-test.c | 24 ++++++++++
  drivers/pci/endpoint/pci-epc-core.c           |  6 ++-
  include/linux/pci-epc.h                       | 45 +++++++++++++++++--
  .../pci_endpoint/pci_endpoint_test.c          |  4 ++
  19 files changed, 173 insertions(+), 125 deletions(-)

Hi Niklas,

I verified this patch series, along with the one linked below, on the Jetson AGX Orin platform:
https://lore.kernel.org/linux-pci/[email protected]/T/#t

I reviewed the BAR details in the lspci -vvv output—all three BARs are enabled.
I also ran pci_endpoint_test, and all tests passed successfully.

Thanks,
Manikanta

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