Add the missing bits for the character and behaviour masks used to indicate the valid bits in the result of KVM_PPC_GET_CPU_CHAR ioctl used by KVM guests to know the host mitigation status.
Signed-off-by: Gautam Menghani <[email protected]> --- arch/powerpc/include/uapi/asm/kvm.h | 6 ++++++ arch/powerpc/kvm/powerpc.c | 10 ++++++++-- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/uapi/asm/kvm.h b/arch/powerpc/include/uapi/asm/kvm.h index 077c5437f521..19ad60fb9147 100644 --- a/arch/powerpc/include/uapi/asm/kvm.h +++ b/arch/powerpc/include/uapi/asm/kvm.h @@ -450,11 +450,17 @@ struct kvm_ppc_cpu_char { #define KVM_PPC_CPU_CHAR_MTTRIG_THR_RECONF (1ULL << 57) #define KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS (1ULL << 56) #define KVM_PPC_CPU_CHAR_BCCTR_FLUSH_ASSIST (1ull << 54) +#define KVM_PPC_CPU_CHAR_BCCTR_LINK_FLUSH_ASSIST (1ull << 52) #define KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY (1ULL << 63) #define KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR (1ULL << 62) #define KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR (1ULL << 61) +#define KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY_H (1ull << 60) #define KVM_PPC_CPU_BEHAV_FLUSH_COUNT_CACHE (1ull << 58) +#define KVM_PPC_CPU_BEHAV_FLUSH_LINK_STACK (1ull << 57) +#define KVM_PPC_CPU_BEHAV_NO_L1D_FLUSH_ENTRY (1ull << 56) +#define KVM_PPC_CPU_BEHAV_NO_L1D_FLUSH_UACCESS (1ull << 55) +#define KVM_PPC_CPU_BEHAV_NO_STF_BARRIER (1ull << 54) /* Per-vcpu XICS interrupt controller state */ #define KVM_REG_PPC_ICP_STATE (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x8c) diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c index 2ba057171ebe..642740c86272 100644 --- a/arch/powerpc/kvm/powerpc.c +++ b/arch/powerpc/kvm/powerpc.c @@ -2261,11 +2261,17 @@ static int pseries_get_cpu_char(struct kvm_ppc_cpu_char *cp) KVM_PPC_CPU_CHAR_BR_HINT_HONOURED | KVM_PPC_CPU_CHAR_MTTRIG_THR_RECONF | KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS | - KVM_PPC_CPU_CHAR_BCCTR_FLUSH_ASSIST; + KVM_PPC_CPU_CHAR_BCCTR_FLUSH_ASSIST | + KVM_PPC_CPU_CHAR_BCCTR_LINK_FLUSH_ASSIST; cp->behaviour_mask = KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY | KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR | KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR | - KVM_PPC_CPU_BEHAV_FLUSH_COUNT_CACHE; + KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY_H | + KVM_PPC_CPU_BEHAV_FLUSH_COUNT_CACHE | + KVM_PPC_CPU_BEHAV_FLUSH_LINK_STACK | + KVM_PPC_CPU_BEHAV_NO_L1D_FLUSH_ENTRY | + KVM_PPC_CPU_BEHAV_NO_L1D_FLUSH_UACCESS | + KVM_PPC_CPU_BEHAV_NO_STF_BARRIER; } return 0; } -- 2.50.1 (Apple Git-155)
