On Tue, Aug 19, 2025 at 06:03:24PM +0530, Rakuram Eswaran wrote: > Fixed multiple typos in powerpc/tm reported by Codespell
I don't know what Codespell is, but if you don't understand the context, you end up with quite a few mistakes. > > Signed-off-by: Rakuram Eswaran <rakuram....@gmail.com> > --- > tools/testing/selftests/powerpc/tm/tm-signal-msr-resv.c | 2 +- > tools/testing/selftests/powerpc/tm/tm-signal-stack.c | 4 ++-- > tools/testing/selftests/powerpc/tm/tm-sigreturn.c | 2 +- > tools/testing/selftests/powerpc/tm/tm-tar.c | 2 +- > tools/testing/selftests/powerpc/tm/tm-tmspr.c | 2 +- > tools/testing/selftests/powerpc/tm/tm-trap.c | 4 ++-- > 6 files changed, 8 insertions(+), 8 deletions(-) > > diff --git a/tools/testing/selftests/powerpc/tm/tm-signal-msr-resv.c > b/tools/testing/selftests/powerpc/tm/tm-signal-msr-resv.c > index 4a61e9bd12b4..8aee18819603 100644 > --- a/tools/testing/selftests/powerpc/tm/tm-signal-msr-resv.c > +++ b/tools/testing/selftests/powerpc/tm/tm-signal-msr-resv.c > @@ -42,7 +42,7 @@ void signal_usr1(int signum, siginfo_t *info, void *uc) > #else > ucp->uc_mcontext.uc_regs->gregs[PT_MSR] |= (7ULL); > #endif > - /* Should segv on return becuase of invalid context */ > + /* Should segv on return because of invalid context */ > segv_expected = 1; > } > > diff --git a/tools/testing/selftests/powerpc/tm/tm-signal-stack.c > b/tools/testing/selftests/powerpc/tm/tm-signal-stack.c > index 68807aac8dd3..e793b5d97c48 100644 > --- a/tools/testing/selftests/powerpc/tm/tm-signal-stack.c > +++ b/tools/testing/selftests/powerpc/tm/tm-signal-stack.c > @@ -2,7 +2,7 @@ > /* > * Copyright 2015, Michael Neuling, IBM Corp. > * > - * Test the kernel's signal delievery code to ensure that we don't > + * Test the kernel's signal delivery code to ensure that we don't > * trelaim twice in the kernel signal delivery code. This can happen trelaim does not exist AFAICS, but treclaim does (actually did since TM has been removed from the architecture). > * if we trigger a signal when in a transaction and the stack pointer > * is bogus. > @@ -52,7 +52,7 @@ int tm_signal_stack() > > /* > * The flow here is: > - * 1) register a signal handler (so signal delievery occurs) > + * 1) register a signal handler (so signal delivery occurs) > * 2) make stack pointer (r1) = NULL > * 3) start transaction > * 4) cause segv > diff --git a/tools/testing/selftests/powerpc/tm/tm-sigreturn.c > b/tools/testing/selftests/powerpc/tm/tm-sigreturn.c > index ffe4e5515f33..4dfb25409393 100644 > --- a/tools/testing/selftests/powerpc/tm/tm-sigreturn.c > +++ b/tools/testing/selftests/powerpc/tm/tm-sigreturn.c > @@ -5,7 +5,7 @@ > * > * Test the kernel's signal returning code to check reclaim is done if the > * sigreturn() is called while in a transaction (suspended since active is > - * already dropped trough the system call path). > + * already dropped through the system call path). > * > * The kernel must discard the transaction when entering sigreturn, since > * restoring the potential TM SPRS from the signal frame is requiring to not > be > diff --git a/tools/testing/selftests/powerpc/tm/tm-tar.c > b/tools/testing/selftests/powerpc/tm/tm-tar.c > index f2a9137f3c1e..ea420caa3961 100644 > --- a/tools/testing/selftests/powerpc/tm/tm-tar.c > +++ b/tools/testing/selftests/powerpc/tm/tm-tar.c > @@ -50,7 +50,7 @@ int test_tar(void) > "bne 2b;" > "tend.;" > > - /* Transaction sucess! TAR should be 3 */ > + /* Transaction success! TAR should be 3 */ > "mfspr 7, %[tar];" > "ori %[res], 7, 4;" // res = 3|4 = 7 > "b 4f;" > diff --git a/tools/testing/selftests/powerpc/tm/tm-tmspr.c > b/tools/testing/selftests/powerpc/tm/tm-tmspr.c > index dd5ddffa28b7..e2c3ae7c9035 100644 > --- a/tools/testing/selftests/powerpc/tm/tm-tmspr.c > +++ b/tools/testing/selftests/powerpc/tm/tm-tmspr.c > @@ -9,7 +9,7 @@ > * - TFIAR - stores address of location of transaction failure > * - TFHAR - stores address of software failure handler (if transaction > * fails) > - * - TEXASR - lots of info about the transacion(s) > + * - TEXASR - lots of info about the transaction(s) > * > * (1) create more threads than cpus > * (2) in each thread: > diff --git a/tools/testing/selftests/powerpc/tm/tm-trap.c > b/tools/testing/selftests/powerpc/tm/tm-trap.c > index 97cb74768e30..99acb7c78403 100644 > --- a/tools/testing/selftests/powerpc/tm/tm-trap.c > +++ b/tools/testing/selftests/powerpc/tm/tm-trap.c > @@ -91,9 +91,9 @@ void trap_signal_handler(int signo, siginfo_t *si, void *uc) > * LE endianness does in effect nothing, instruction (2) > * is then executed again as 'trap', generating a second > * trap event (note that in that case 'trap' is caught > - * not in transacional mode). On te other hand, if after > + * not in transactional mode). On the other hand, if > after > * the return from the signal handler the endianness in- > - * advertently flipped, instruction (1) is tread as a > + * advertently flipped, instruction (1) is thread as a Looks like nonsense, it's actually very likely that the original author meant "treated" (or handled). > * branch instruction, i.e. b .+8, hence instruction (3) > * and (4) are executed (tbegin.; trap;) and we get sim- > * ilaly on the trap signal handler, but now in TM mode. > -- > 2.43.0 > > Gabriel
