On Mon, 23 Jun 2025 16:54:19 +0200 "Fabio M. De Francesco" <fabio.m.de.france...@linux.intel.com> wrote:
> I/O Machine Check Architecture events may signal failing PCIe components > or links. The AER event contains details on what was happening on the wire > when the error was signaled. > > Trace the CPER PCIe Error section (UEFI v2.10, Appendix N.2.7) reported > by the I/O MCA. > > Cc: Dan Williams <dan.j.willi...@intel.com> > Reviewed-by: Dave Jiang <dave.ji...@intel.com> > Signed-off-by: Fabio M. De Francesco <fabio.m.de.france...@linux.intel.com> Reviewed-by: Jonathan Cameron <jonathan.came...@huawei.com>
