Add fsl,imx23-digctl.yaml for i.MX23 and i.MX28 to fix below CHECK_DTB
warning:
arch/arm/boot/dts/nxp/mxs/imx23-sansa.dtb:
/apb@80000000/apbh-bus@80000000/digctl@8001c000:
failed to match any schema with compatible: ['fsl,imx23-digctl']
Signed-off-by: Frank Li <frank...@nxp.com>
---
change in v2
- add more description about digctrl hardware module
- fix double /
---
.../bindings/soc/fsl/fsl,imx23-digctl.yaml | 53 +++++++++++++++++++
1 file changed, 53 insertions(+)
create mode 100644
Documentation/devicetree/bindings/soc/fsl/fsl,imx23-digctl.yaml
diff --git a/Documentation/devicetree/bindings/soc/fsl/fsl,imx23-digctl.yaml
b/Documentation/devicetree/bindings/soc/fsl/fsl,imx23-digctl.yaml
new file mode 100644
index 0000000000000..3de135a70579a
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/fsl/fsl,imx23-digctl.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/fsl/fsl,imx23-digctl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale mxs digctrl for i.MX23/i.MX28
+
+description: |
+ The digital control block provides overall control of various items within
+ the top digital block of the chip, including:
+ - Default first-level page table (DFLPT) controls
+ - HCLK performance counter
+ - Free-running microseconds counter
+ - Entropy control
+ - BIST controls for ARM Core and On-Chip RAM
+ - Chip Revision register
+ - USB loop back congtrol
+ - Other miscellaneous controls
+
+maintainers:
+ - Frank Li <frank...@nxp.com>
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,imx28-digctl
+ - const: fsl,imx23-digctl
+ - const: fsl,imx23-digctl
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ digctl@8001c000 {
+ compatible = "fsl,imx28-digctl", "fsl,imx23-digctl";
+ reg = <0x8001c000 0x2000>;
+ interrupts = <89>;
+ };
+
--
2.34.1
