On 11/03/2025 08:51, Yicong Yang wrote:
> From: Yicong Yang <yangyic...@hisilicon.com>
>
> On building the topology from the devicetree, we've already gotten the
> SMT thread number of each core. Update the largest SMT thread number
> and enable the SMT control by the end of topology parsing.
>
> The framework's SMT control provides two interface to the users [1]
> through /sys/devices/system/cpu/smt/control:
> 1) enable SMT by writing "on" and disable by "off"
> 2) enable SMT by writing max_thread_number or disable by writing 1
>
> Both method support to completely disable/enable the SMT cores so both
> work correctly for symmetric SMT platform and asymmetric platform with
> non-SMT and one type SMT cores like:
> core A: 1 thread
> core B: X (X!=1) threads
>
> Note that for a theoretically possible multiple SMT-X (X>1) core
> platform the SMT control is also supported as expected but only
> by writing the "on/off" method.
Here we still have a little misunderstanding. IMHO, even on such a
system 2) would work too.
My qemu example with SMT-1, SMT-2 and SMT-4 in one system from your v11:
# cat /proc/schedstat | grep -v "^v\|^t" | awk '{print $1" "$2" "$3}'
cpu0 0 0
domain0 MC ff
cpu1 0 0
domain0 MC ff
cpu2 0 0
domain0 SMT 0c
domain1 MC ff
cpu3 0 0
domain0 SMT 0c
domain1 MC ff
cpu4 0 0
domain0 SMT f0
domain1 MC ff
cpu5 0 0
domain0 SMT f0
domain1 MC ff
cpu6 0 0
domain0 SMT f0
domain1 MC ff
cpu7 0 0
domain0 SMT f0
domain1 MC ff
# cat /proc/cpuinfo | grep ^processor
processor : 0
processor : 1
processor : 2
processor : 3
processor : 4
processor : 5
processor : 6
processor : 7
# echo 1 > /sys/devices/system/cpu/smt/control
# cat /proc/cpuinfo | grep ^processor
processor : 0
processor : 1
processor : 2
processor : 4
# echo 4 > /sys/devices/system/cpu/smt/control
# cat /proc/cpuinfo | grep ^processor
processor : 0
processor : 1
processor : 2
processor : 3
processor : 4
processor : 5
processor : 6
processor : 7
Whats doesn't work is to echoing a '2' but that's not
'max_thread_number' of the system.
[...]
