On Fri, Jan 31, 2025 at 10:32:55AM -0600, Segher Boessenkool wrote: > On Wed, Jan 29, 2025 at 04:06:03PM +1000, Nicholas Piggin wrote: > > Does wait cause MSR[EE] to be set? If not, do you need to use > > prep_irq_for_idle_irqsoff() here maybe? > > Assuming this does implement the standard ISA 2.03 wait instruction
ISA 2.03? I don't have a copy of 2.03. I looked in 2.04 and the wait instruction there has a different extended opcode from the ISA 3.0/3.1 wait instruction. Why is ISA 2.03 at all relevant to anything here? In any case, the description of the wait instruction in 2.04 doesn't actually say that it waits for anything other than all previous instructions being finished. > (and it better), this does not do anything other than to stop fetching > and execution until some later event happens. > > What values of the WC field does uwatt implement? Just WC=0; for other values it's a no-op. (Which is still arguably correct given that execution is allowed to resume when an implementation-dependent event occurs; P9 for instance just stops for a few microseconds, if I recall correctly, for any WC value.) Paul.
