diff --git a/arch/powerpc/kernel/idle_6xx.S b/arch/powerpc/kernel/
idle_6xx.S
index 019b02d..0138d88 100644
--- a/arch/powerpc/kernel/idle_6xx.S
+++ b/arch/powerpc/kernel/idle_6xx.S
@@ -151,19 +151,20 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
* Return from NAP/DOZE mode, restore some CPU specific registers,
* we are called with DR/IR still off and r2 containing physical
* address of current. R11 points to the exception frame (physical
- * address). We have to preserve r10.
+ * address). We have to preserve r10. R9 contains the physical
+ * address of thread_info.
*/
_GLOBAL(power_save_ppc32_restore)
- lwz r9,_LINK(r11) /* interrupted in ppc6xx_idle: */
- stw r9,_NIP(r11) /* make it do a blr */
-
#ifdef CONFIG_SMP
- mfspr r12,SPRN_SPRG3
- lwz r11,TI_CPU(r12) /* get cpu number * 4 */
+ lwz r11,TI_CPU(r9) /* get cpu number * 4 */
slwi r11,r11,2
#else
li r11,0
#endif
+
+ lwz r9,_LINK(r11) /* interrupted in ppc6xx_idle: */
+ stw r9,_NIP(r11) /* make it do a blr */
+
this is just brain damaged as I'm clobber r11 before setting up r9
with LR. V2 of the patch does things right.
- k
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