Hi!
On Thu, Aug 22, 2024 at 06:39:33AM +0000, LEROY Christophe wrote:
> Le 22/08/2024 à 07:32, Christoph Hellwig a écrit :
> > On Thu, Aug 22, 2024 at 05:25:10AM +0000, LEROY Christophe wrote:
> >>> and this results in a call to dma_direct_allocation(), which has one
> >>> innocent looking memset():
> >>
> >>
> >> memset() can't be used on non-cached memory, memset_io() has to be used
> >> instead.
> >
> > No, we use memset on uncached memory all the time. Note that uncached
> > memory != __iomem memory, for which you DO have to use memset_io.
> >
>
> Then we have a subject here.
>
> powerpc has a magic instruction 'dcbz' which clears a full cacheline in
> one go. It is far more efficient than a loop to store zeros, and since
> 2015 memset(0) has been implemented with that instruction (commit
> 5b2a32e80634 ("powerpc/32: memset(0): use cacheable_memzero"))
>
> But that instruction generates an alignment exception when used on
> non-cached memory (whether it is RAM or not doesn't matter).
What does "uncached memory" even mean here? Literally it would be
I=1 memory (uncachEABLE memory), but more likely you want M=0 memory
here ("non-memory memory", "not well-behaved memory", MMIO often).
M=0 memory shouldn't ever have memset done on it, that is insane. And
I=1 memory should not have the same optimised routines used, since
those only make things slower still.
> It is then
> emulated by the kernel but it of course leads to a serious performance
> degradation, hence the warning added by commit cbe654c77961 ("powerpc:
> warn on emulation of dcbz instruction in kernel mode"). Until now it
> helped identify and fix use of memset() on IO memory.
>
> But if memset() is expected to be used with non-cached RAM, then I don't
> know what to do. Any suggestion ?
If memset() is expected to be used with M=0, you cannot do any serious
optimisations to it at all. If memset() is expected to be used with I=1
it should use a separate code path for it, probably the caller should
make the distinction.
Segher
