On Fri, 16 Aug 2024 16:13:01 +0100,
Joey Gouly <joey.go...@arm.com> wrote:
>
> On Fri, Aug 16, 2024 at 03:55:11PM +0100, Marc Zyngier wrote:
> > On Fri, 03 May 2024 14:01:25 +0100,
> > Joey Gouly <joey.go...@arm.com> wrote:
> > >
> > > + if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, S1POE, IMP))
> > > + kvm->arch.fgu[HFGxTR_GROUP] |= (HFGxTR_EL2_nPOR_EL1 |
> > > + HFGxTR_EL2_nPOR_EL0);
> > > +
> >
> > As Broonie pointed out in a separate thread, this cannot work, short
> > of making ID_AA64MMFR3_EL1 writable.
> >
> > This can be done in a separate patch, but it needs doing as it
> > otherwise breaks migration.
> >
> > Thanks,
> >
> > M.
> >
>
> Looks like it's wrong for PIE currently too, but your patch here fixes that:
> https://lore.kernel.org/kvmarm/20240813144738.2048302-11-...@kernel.org/
>
> If I basically apply that patch, but only for POE, the conflict can be
> resolved
> later, or a rebase will fix it up, depending on what goes through first.
If I trust my feature dependency decoder, you need to make both
TCRX and POE writable:
(FEAT_S1POE --> v8Ap8)
(FEAT_S1POE --> FEAT_TCR2)
(FEAT_S1POE --> FEAT_ATS1A)
(FEAT_S1POE --> FEAT_HPDS)
(FEAT_S1POE <-> (AArch64 ID_AA64MMFR3_EL1.S1POE >= 1))
(FEAT_TCR2 --> v8Ap0)
(v8Ap9 --> FEAT_TCR2)
((FEAT_TCR2 && FEAT_AA64EL2) --> FEAT_HCX)
(FEAT_TCR2 <-> (AArch64 ID_AA64MMFR3_EL1.TCRX >= 1))
Feel free to lift part of that patch as you see fit.
M.
--
Without deviation from the norm, progress is not possible.
