Make the flash size 8M to be consistent with the module comes with board.
Add predefined partitions for the flash. Add ethernet port aliases.
Signed-off-by: Li Yang <[EMAIL PROTECTED]>
---
arch/powerpc/boot/dts/mpc8272ads.dts | 38 +++++++++++++++++++++++++++++----
1 files changed, 33 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts
b/arch/powerpc/boot/dts/mpc8272ads.dts
index 2a1929a..b2ce4c0 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -17,6 +17,11 @@
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -46,15 +51,38 @@
#size-cells = <1>;
reg = <0xf0010100 0x40>;
- ranges = <0x0 0x0 0xfe000000 0x2000000
+ ranges = <0x0 0x0 0xff800000 0x800000
0x1 0x0 0xf4500000 0x8000
0x3 0x0 0xf8200000 0x8000>;
[EMAIL PROTECTED],0 {
- compatible = "jedec-flash";
- reg = <0x0 0x0 0x2000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ probe-type = "CFI";
+ reg = <0x0 0x0 0x800000>;
bank-width = <4>;
device-width = <1>;
+ [EMAIL PROTECTED] {
+ label = "hrcw";
+ reg = <0x0 0x40000>;
+ };
+ [EMAIL PROTECTED] {
+ label = "fs";
+ reg = <0x40000 0x540000>;
+ };
+ [EMAIL PROTECTED] {
+ label = "kernel";
+ reg = <0x580000 0x180000>;
+ };
+ [EMAIL PROTECTED] {
+ label = "u-boot";
+ reg = <0x700000 0x40000>;
+ };
+ [EMAIL PROTECTED] {
+ label = "u-boot-env";
+ reg = <0x740000 0x40000>;
+ };
};
[EMAIL PROTECTED],0 {
@@ -192,7 +220,7 @@
};
};
- [EMAIL PROTECTED] {
+ enet0: [EMAIL PROTECTED] {
device_type = "network";
compatible = "fsl,mpc8272-fcc-enet",
"fsl,cpm2-fcc-enet";
@@ -205,7 +233,7 @@
fsl,cpm-command = <0x12000300>;
};
- [EMAIL PROTECTED] {
+ enet1: [EMAIL PROTECTED] {
device_type = "network";
compatible = "fsl,mpc8272-fcc-enet",
"fsl,cpm2-fcc-enet";
--
1.5.5.1.248.g4b17
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