On Tue, Jul 22, 2008 at 12:54:03AM -0600, Grant Likely wrote:

> Signed-off-by: Grant Likely <[EMAIL PROTECTED]>

Signed-off-by: Mark Brown <[EMAIL PROTECTED]>

with the same comments about outstanding issues as applied to the CPU
side.

> +static int aic26_hw_params(struct snd_pcm_substream *substream,
> +                        struct snd_pcm_hw_params *params)
> +{

> +     switch (params_rate(params)) {
> +     case 8000:  fsref = 48000; divisor = AIC26_DIV_6; break;

> +     /* Configure PLL */
> +     pval = 1;
> +     jval = (fsref == 44100) ? 7 : 8;
> +     dval = (fsref == 44100) ? 5264 : 1920;

Without having looked at the chip datasheet these parameters probably
all need to depend on the input clock rate and the PLL configuration
should be done in a set_pll() rather than here.

> +#if defined(CONFIG_SND_SOC_OF_SIMPLE)
> +     /* Tell the of_soc helper about this codec */
> +     of_snd_soc_register_codec(&aic26_soc_codec_dev, aic26, &aic26_dai,
> +                               spi->dev.archdata.of_node);
> +#endif

This won't work if the OF_SIMPLE stuff is a module.  There's also a
checkpatch issue which I'll fix up.
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