Le 15/02/2023 à 23:44, Leo Li a écrit : > > >> -----Original Message----- >> From: Herve Codina <herve.cod...@bootlin.com> >> Sent: Thursday, January 26, 2023 2:32 AM >> To: Herve Codina <herve.cod...@bootlin.com>; Leo Li >> <leoyang...@nxp.com>; Rob Herring <robh...@kernel.org>; Krzysztof >> Kozlowski <krzysztof.kozlowski...@linaro.org>; Liam Girdwood >> <lgirdw...@gmail.com>; Mark Brown <broo...@kernel.org>; Christophe >> Leroy <christophe.le...@csgroup.eu>; Michael Ellerman >> <m...@ellerman.id.au>; Nicholas Piggin <npig...@gmail.com>; Qiang Zhao >> <qiang.z...@nxp.com>; Jaroslav Kysela <pe...@perex.cz>; Takashi Iwai >> <ti...@suse.com>; Shengjiu Wang <shengjiu.w...@gmail.com>; Xiubo Li >> <xiubo....@gmail.com>; Fabio Estevam <feste...@gmail.com>; Nicolin >> Chen <nicoleots...@gmail.com> >> Cc: linuxppc-dev@lists.ozlabs.org; linux-arm-ker...@lists.infradead.org; >> devicet...@vger.kernel.org; linux-ker...@vger.kernel.org; alsa-devel@alsa- >> project.org; Thomas Petazzoni <thomas.petazz...@bootlin.com> >> Subject: [PATCH v4 06/10] soc: fsl: cmp1: Add support for QMC > > Typo: cpm1 > >> >> The QMC (QUICC Multichannel Controller) emulates up to 64 channels within >> one serial controller using the same TDM physical interface routed from the >> TSA. >> >> It is available in some PowerQUICC SoC such as the >> MPC885 or MPC866. >> >> It is also available on some Quicc Engine SoCs. >> This current version support CPM1 SoCs only and some enhancement are >> needed to support Quicc Engine SoCs. >> >> Signed-off-by: Herve Codina <herve.cod...@bootlin.com> > > Otherwise looks good to me. > > Acked-by: Li Yang <leoyang...@nxp.com>
Thanks for the review and the ack. Were you also able to have a look at patch 2 which implements support for the timeslot assigner (TSA) ? Christophe
