On Tue, Jul 08, 2008 at 08:41:11AM -0600, John Linn wrote:
> Thanks for the comments David.
[snip]
> > > + chosen {
> > > + bootargs = "console=ttyS0 ip=on root=/dev/ram";
> >
> > Bootargs like this should not typically go in the dts file.
> >
>
> My understanding is the bootloader would also fill these in.
> With the FGPA, a bootloader is not used many times so that's the
> reason we have put it into the dts file.
Hrm. There are several places you can encode a default command line
into a zImage, and I don't think the dts is the most sensible. I'd
suggest in the config instead, it's easier for users to change if
necessary that way.
> > > + linux,stdout-path = "/[EMAIL PROTECTED]/[EMAIL PROTECTED]";
> > > + } ;
> > > + cpus {
> > > + #address-cells = <1>;
> > > + #cpus = <1>;
> > > + #size-cells = <0>;
> > > + ppc440_0: [EMAIL PROTECTED] {
> > > + clock-frequency = "";
> >
> > Presumably this is supposed to be filled in by the bootloader. But in
> > any case it shouldn't be a string.
> >
>
> I think this was my screw-up as it should have the same value as the
> timebase.
> Interesting, it's not being used for anything that stops the system from
> working.
Ok.
> > [snip]
> > > + DMA0: [EMAIL PROTECTED] {
> > > + compatible = "xlnx,ll-dma-1.00.a";
> > > + dcr-reg = < 0x80 0x11 >;
> > > + interrupt-parent = <&xps_intc_0>;
> > > + interrupts = < 9 2 0xa 2 >;
> > > + } ;
> >
> > Putting devices under the cpu node is certainly... atypical. It's not
> > obviously wrong, for a dcr device like this, but we probably want a
> > little more discussion before establishing a convention like this.
>
> We had this discussion somewhat in a earlier message, 6/23 adding
> virtex5
> Powerpc 440 support, and Stephen answered with the following which still
> seems
> applicable.
>
> >From Stephenn:
>
> In Virtex 5 FX, the processor block (as represented in all the processor
> design tools) is actually a processor block, plus a crossbar switch,
> plus dma blocks. I think there's a tradeoff between modeling this
> independently, or modeling it as an FPGA user sees it. From the
> perspective of the FPGA user, this is the way the system looks (although
> I agree that it's odd). What would be even better, is if the processor
> block was modeled as a DTS I could write by hand, and to include it into
> the generated DTS. (Another good use for grafting of device trees...)
Hmm. Not really convinced either way.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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