On Sat, 2008-07-05 at 15:43 +1000, Michael Ellerman wrote: > > The current Cell IOMMU implementation sets the IOPTE_SO_RW bits in all > > IOTPEs > > (for both the dynamic and fixed mappings) which enforces strong ordering of > > both reads and writes. This patch makes the default behaviour weak ordering > > (the IOPTE_SO_RW bits not set) and to request a strongly ordered mapping the > > new DMA_ATTR_STRONG_ORDERING needs to be used. > > We're sure that's safe?
I'd say it's not... Ben. _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
