From: Grant Likely <[EMAIL PROTECTED]>
Add documentation about how to describe SPI busses in the device tree.
Signed-off-by: Grant Likely <[EMAIL PROTECTED]>
---
Documentation/powerpc/booting-without-of.txt | 60 ++++++++++++++++++++++++++
1 files changed, 60 insertions(+), 0 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt
b/Documentation/powerpc/booting-without-of.txt
index 1d2a772..7d3564f 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -58,6 +58,7 @@ Table of Contents
o) Xilinx IP cores
p) Freescale Synchronous Serial Interface
q) USB EHCI controllers
+ t) SPI busses
VII - Marvell Discovery mv64[345]6x System Controller chips
1) The /system-controller node
@@ -2870,6 +2871,65 @@ platforms are moved over to use the
flattened-device-tree model.
reg = <0xe8000000 32>;
};
+ t) SPI (Serial Peripheral Interface) busses
+
+ SPI busses can be described with a node for the SPI master device
+ and a set of child nodes for each SPI slave on the bus. For this
+ discussion, it is assumed that the system's SPI controller is in
+ SPI master mode. This binding does not describe SPI controllers
+ in slave mode.
+
+ The SPI master node requires the following properties:
+ - #address-cells - number of cells required to define a chip select
+ address on the SPI bus.
+ - #size-cells - should be zero.
+ - compatible - name of SPI bus controller following generic names
+ recommended practice.
+ No other properties are required in the SPI bus node. It is assumed
+ that a driver for an SPI bus device will understand that it is an SPI bus.
+ However, the binding does not attempt to define the specific method for
+ assigning chip select numbers. Since SPI chip select configuration is
+ flexible and non-standardized, it is left out of this binding with the
+ assumption that board specific platform code will be used to manage
+ chip selects. Individual drivers can define additional properties to
+ support describing the chip select layout.
+
+ SPI slave nodes must be children of the SPI master node and can
+ contain the following properties.
+ - reg - (required) chip select address of device.
+ - compatible - (required) name of SPI device following generic names
+ recommended practice
+ - max-speed - (required) Maximum SPI clocking speed of device in Hz
+ - spi,cpol - (optional) Device requires inverse clock polarity
+ - spi,cpha - (optional) Device requires shifted clock phase
+ - linux,modalias - (optional, Linux specific) Force binding of SPI device
+ to a particular spi_device driver. Useful for changing
+ driver binding between spidev and a kernel SPI driver.
+
+ SPI example for an MPC5200 SPI bus:
+ [EMAIL PROTECTED] {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
+ reg = <0xf00 0x20>;
+ interrupts = <2 13 0 2 14 0>;
+ interrupt-parent = <&mpc5200_pic>;
+
+ [EMAIL PROTECTED] {
+ compatible = "micrel,ks8995m";
+ linux,modalias = "ks8995";
+ max-speed = <1000000>;
+ reg = <0>;
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = "ti,tlv320aic26";
+ max-speed = <100000>;
+ reg = <1>;
+ };
+ };
+
+
VII - Marvell Discovery mv64[345]6x System Controller chips
===========================================================
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