On Mon, 17 Jan 2022 23:44:03 +1000, Nicholas Piggin wrote:
> Commit 314f6c23dd8d ("powerpc/64s: Mask NIP before checking against
> SRR0") masked off the low 2 bits of the NIP value in the interrupt
> stack frame in case they are non-zero and mis-compare against a SRR0
> register value of a CPU which always reads back 0 from the 2 low bits
> which are reserved.
>
> This now causes the opposite problem that an implementation which does
> implement those bits in SRR0 will mis-compare against the masked NIP
> value in which they have been cleared. QEMU is one such implementation,
> and this is allowed by the architecture.
>
> [...]
Applied to powerpc/fixes.
[1/1] powerpc/64s: Mask SRR0 before checking against the masked NIP
https://git.kernel.org/powerpc/c/aee101d7b95a03078945681dd7f7ea5e4a1e7686
cheers
