Clang warns:
arch/powerpc/mm/book3s64/radix_tlb.c:1191:23: error: variable 'hstart' is
uninitialized when used here [-Werror,-Wuninitialized]
__tlbiel_va_range(hstart, hend, pid,
^~~~~~
arch/powerpc/mm/book3s64/radix_tlb.c:1175:23: note: initialize the variable
'hstart' to silence this warning
unsigned long hstart, hend;
^
= 0
arch/powerpc/mm/book3s64/radix_tlb.c:1191:31: error: variable 'hend' is
uninitialized when used here [-Werror,-Wuninitialized]
__tlbiel_va_range(hstart, hend, pid,
^~~~
arch/powerpc/mm/book3s64/radix_tlb.c:1175:29: note: initialize the variable
'hend' to silence this warning
unsigned long hstart, hend;
^
= 0
2 errors generated.
Rework the if-else to pull the 'IS_ENABLE(CONFIG_TRANSPARENT_HUGEPAGE)'
check one level up, this will silent the warnings. That will also
simplify the 'else' path. Clang is getting confused with these warnings,
but the warnings is a false-positive.
Suggested-by: Arnd Bergmann <a...@arndb.de>
Signed-off-by: Anders Roxell <anders.rox...@linaro.org>
---
arch/powerpc/mm/book3s64/radix_tlb.c | 31 +++++++++++++++++++++-------
1 file changed, 24 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/mm/book3s64/radix_tlb.c
b/arch/powerpc/mm/book3s64/radix_tlb.c
index 7724af19ed7e..e494a45ce1b4 100644
--- a/arch/powerpc/mm/book3s64/radix_tlb.c
+++ b/arch/powerpc/mm/book3s64/radix_tlb.c
@@ -1170,16 +1170,14 @@ static inline void __radix__flush_tlb_range(struct
mm_struct *mm,
_tlbiel_pid_multicast(mm, pid, RIC_FLUSH_ALL);
}
}
- } else {
+ } else if (IS_ENABLED(CONFIG_TRANSPARENT_HUGEPAGE)) {
bool hflush = false;
unsigned long hstart, hend;
- if (IS_ENABLED(CONFIG_TRANSPARENT_HUGEPAGE)) {
- hstart = (start + PMD_SIZE - 1) & PMD_MASK;
- hend = end & PMD_MASK;
- if (hstart < hend)
- hflush = true;
- }
+ hstart = (start + PMD_SIZE - 1) & PMD_MASK;
+ hend = end & PMD_MASK;
+ if (hstart < hend)
+ hflush = true;
if (type == FLUSH_TYPE_LOCAL) {
asm volatile("ptesync": : :"memory");
@@ -1207,6 +1205,25 @@ static inline void __radix__flush_tlb_range(struct
mm_struct *mm,
_tlbiel_va_range_multicast(mm,
hstart, hend, pid, PMD_SIZE,
MMU_PAGE_2M, flush_pwc);
}
+ } else {
+
+ if (type == FLUSH_TYPE_LOCAL) {
+ asm volatile("ptesync" : : : "memory");
+ if (flush_pwc)
+ /* For PWC, only one flush is needed */
+ __tlbiel_pid(pid, 0, RIC_FLUSH_PWC);
+ __tlbiel_va_range(start, end, pid, page_size,
mmu_virtual_psize);
+ ppc_after_tlbiel_barrier();
+ } else if (cputlb_use_tlbie()) {
+ asm volatile("ptesync" : : : "memory");
+ if (flush_pwc)
+ __tlbie_pid(pid, RIC_FLUSH_PWC);
+ __tlbie_va_range(start, end, pid, page_size,
mmu_virtual_psize);
+ asm volatile("eieio; tlbsync; ptesync" : : : "memory");
+ } else {
+ _tlbiel_va_range_multicast(mm,
+ start, end, pid, page_size,
mmu_virtual_psize, flush_pwc);
+ }
}
out:
preempt_enable();
--
2.33.0
