On Wed, 11 Jun 2008 10:50:31 +1000
Benjamin Herrenschmidt <[EMAIL PROTECTED]> wrote:

> This is some preliminary work to improve TLB management on SW loaded
> TLB powerpc platforms. This introduce support for non-atomic PTE
> operations in pgtable-ppc32.h and removes write back to the PTE from
> the TLB miss handlers. In addition, the DSI interrupt code no longer
> tries to fixup write permission, this is left to generic code, and
> _PAGE_HWWRITE is gone.
> 
> Signed-off-by: Benjamin Herrenschmidt <[EMAIL PROTECTED]>
> ---
> 
> This is a first step, plan is to do the same for FSL BookE, 405 and
> possibly 8xx too. From there, I want to rework a bit the execute
> permission handling to avoid multiple faults, add support for
> _PAGE_EXEC (no executable mappings), for prefaulting (especially
> for kmap) and proper SMP support for future SMP capable BookE
> platforms.

I've looked this over quite a bit and can't find anything wrong with
it.  As soon as I get my boards set back up next week, I will try it
out on a few and see if I can find a good stress test as well.

If you could add the comments that Kumar suggested and send out an
updated patch, I'm inclined to get this into 2.6.27, but we should do
that soon if that is our target.

josh
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