dcbz instruction shouldn't be used on non-cached memory. Using it on non-cached memory can result in alignment exception and implies a heavy handling.
Instead of silentely emulating the instruction and resulting in high performance degradation, warn whenever an alignment exception is taken due to dcbz, so that the user is made aware that dcbz instruction has been used unexpectedly. Reported-by: Stan Johnson <user...@yahoo.com> Cc: Finn Thain <fth...@linux-m68k.org> Signed-off-by: Christophe Leroy <christophe.le...@csgroup.eu> --- arch/powerpc/kernel/align.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c index bbb4181621dd..adc3a4a9c6e4 100644 --- a/arch/powerpc/kernel/align.c +++ b/arch/powerpc/kernel/align.c @@ -349,6 +349,7 @@ int fix_alignment(struct pt_regs *regs) if (op.type != CACHEOP + DCBZ) return -EINVAL; PPC_WARN_ALIGNMENT(dcbz, regs); + WARN_ON_ONCE(1); r = emulate_dcbz(op.ea, regs); } else { if (type == LARX || type == STCX) -- 2.31.1