Le 13/08/2021 à 10:24, Kajol Jain a écrit :
Incase of random sampling, there can be scenarios where SIAR is not
latching sample address and results in 0 value. Since current code
directly returning the siar value, we could see multiple instruction
pointer values as 0 in perf report.
Patch resolves this issue by adding a ternary condition to return
regs->nip incase SIAR is 0.
Your description seems rather similar to
https://github.com/linuxppc/linux/commit/2ca13a4cc56c920a6c9fc8ee45d02bccacd7f46c
Does it mean that the problem occurs on more than the power10 DD1 ?
In that case, can the solution be common instead of doing something for power10 DD1 and something
for others ?
Fixes: 75382aa72f06 ("powerpc/perf: Move code to select SIAR or pt_regs
into perf_read_regs")
Signed-off-by: Kajol Jain <kj...@linux.ibm.com>
---
arch/powerpc/perf/core-book3s.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 1b464aad29c4..aeecaaf6810f 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -2260,7 +2260,7 @@ unsigned long perf_instruction_pointer(struct pt_regs
*regs)
else
return regs->nip;
} else if (use_siar && siar_valid(regs))
- return siar + perf_ip_adjust(regs);
+ return siar ? siar + perf_ip_adjust(regs) : regs->nip;
else if (use_siar)
return 0; // no valid instruction pointer
else
