Excerpts from Andreas Schwab's message of March 30, 2021 2:23 am: > On Mär 29 2021, Andreas Schwab wrote: > >> On Mär 29 2021, Michael Ellerman wrote: >> >>> Nicholas Piggin <npig...@gmail.com> writes: >>>> There is no need for this to be in asm, use the new intrrupt entry wrapper. >>>> >>>> Signed-off-by: Nicholas Piggin <npig...@gmail.com> >>>> --- >>>> Hopefully this works on a real G5 now, but I couldn't reproduce the >>>> problem with QEMU. >>> >>> It still prevents my G5 from booting. >> >> I see differing failures. What's common is that there is a pause of >> about 60 seconds before the crash occurs. It looks like the crash >> occurs in power4_idle_nap+0x30/0x34. Unfortuately, the BootX console is >> too small to see enough. > > I was now able to see the messages on the VGA console, and the problem > is actually that the cpus are starting to stall.
This is strange, I haven't been able to figure out what is wrong. I've been looking at QEMU code and now I'll have to try find a POWER4/5 or PPC970 manual to see what exactly this MSR[POW] thing does and make sure QEMU matches it. Progress might be slow. Worst case I guess we revert if it can't be fixed before next merge window. Thanks, Nick
