On Tue, 23 Feb 2021 17:02:27 +1000, Russell Currey wrote: > The rfi_flush and entry_flush selftests work by using the PM_LD_MISS_L1 > perf event to count L1D misses. The value of this event has changed > over time: > > - Power7 uses 0x400f0 > - Power8 and Power9 use both 0x400f0 and 0x3e054 > - Power10 uses only 0x3e054 > > [...]
Applied to powerpc/next. [1/1] selftests/powerpc: Fix L1D flushing tests for Power10 https://git.kernel.org/powerpc/c/3a72c94ebfb1f171eba0715998010678a09ec796 cheers