> On 26-Feb-2021, at 3:05 PM, Peter Zijlstra <pet...@infradead.org> wrote:
>
> On Thu, Feb 25, 2021 at 05:10:39AM -0500, Athira Rajeev wrote:
>> diff --git a/arch/powerpc/perf/core-book3s.c
>> b/arch/powerpc/perf/core-book3s.c
>> index 4b4319d8..c8be44c 100644
>> --- a/arch/powerpc/perf/core-book3s.c
>> +++ b/arch/powerpc/perf/core-book3s.c
>> @@ -222,7 +222,7 @@ static inline void perf_get_data_addr(struct perf_event
>> *event, struct pt_regs *
>> if (!(mmcra & MMCRA_SAMPLE_ENABLE) || sdar_valid)
>> *addrp = mfspr(SPRN_SDAR);
>>
>> - if (is_kernel_addr(mfspr(SPRN_SDAR)) && perf_allow_kernel(&event->attr)
>> != 0)
>> + if (is_kernel_addr(mfspr(SPRN_SDAR)) && event->attr.exclude_kernel)
>> *addrp = 0;
>> }
>>
>> @@ -507,7 +507,7 @@ static void power_pmu_bhrb_read(struct perf_event
>> *event, struct cpu_hw_events *
>> * addresses, hence include a check before filtering
>> code
>> */
>> if (!(ppmu->flags & PPMU_ARCH_31) &&
>> - is_kernel_addr(addr) &&
>> perf_allow_kernel(&event->attr) != 0)
>> + is_kernel_addr(addr) && event->attr.exclude_kernel)
>> continue;
>>
>> /* Branches are read most recent first (ie. mfbhrb 0 is
>
> Acked-by: Peter Zijlstra (Intel) <pet...@infradead.org>
Thanks Peter for reviewing the patch.
Athira.
