Fix the event code for events: branch-instructions (to PM_BR_FIN),
branch-misses (to PM_MPRED_BR_FIN) and cache-misses (to
PM_LD_DEMAND_MISS_L1_FIN) for power10 PMU. Update the
list of generic events with this modified event code.

Signed-off-by: Athira Rajeev <atraj...@linux.vnet.ibm.com>
---
 arch/powerpc/perf/power10-events-list.h |  3 +++
 arch/powerpc/perf/power10-pmu.c         | 15 +++++++++------
 2 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/perf/power10-events-list.h 
b/arch/powerpc/perf/power10-events-list.h
index 60c1b81..abd778f 100644
--- a/arch/powerpc/perf/power10-events-list.h
+++ b/arch/powerpc/perf/power10-events-list.h
@@ -15,6 +15,9 @@
 EVENT(PM_RUN_INST_CMPL,                                0x500fa);
 EVENT(PM_BR_CMPL,                               0x4d05e);
 EVENT(PM_BR_MPRED_CMPL,                         0x400f6);
+EVENT(PM_BR_FIN,                               0x2f04a);
+EVENT(PM_MPRED_BR_FIN,                         0x3e098);
+EVENT(PM_LD_DEMAND_MISS_L1_FIN,                        0x400f0);
 
 /* All L1 D cache load references counted at finish, gated by reject */
 EVENT(PM_LD_REF_L1,                            0x100fc);
diff --git a/arch/powerpc/perf/power10-pmu.c b/arch/powerpc/perf/power10-pmu.c
index bc3d4dd..a02da69 100644
--- a/arch/powerpc/perf/power10-pmu.c
+++ b/arch/powerpc/perf/power10-pmu.c
@@ -114,6 +114,9 @@ static int power10_get_alternatives(u64 event, unsigned int 
flags, u64 alt[])
 GENERIC_EVENT_ATTR(cache-misses,               PM_LD_MISS_L1);
 GENERIC_EVENT_ATTR(mem-loads,                  MEM_LOADS);
 GENERIC_EVENT_ATTR(mem-stores,                 MEM_STORES);
+GENERIC_EVENT_ATTR(branch-instructions,                PM_BR_FIN);
+GENERIC_EVENT_ATTR(branch-misses,              PM_MPRED_BR_FIN);
+GENERIC_EVENT_ATTR(cache-misses,               PM_LD_DEMAND_MISS_L1_FIN);
 
 CACHE_EVENT_ATTR(L1-dcache-load-misses,                PM_LD_MISS_L1);
 CACHE_EVENT_ATTR(L1-dcache-loads,              PM_LD_REF_L1);
@@ -157,10 +160,10 @@ static int power10_get_alternatives(u64 event, unsigned 
int flags, u64 alt[])
 static struct attribute *power10_events_attr[] = {
        GENERIC_EVENT_PTR(PM_RUN_CYC),
        GENERIC_EVENT_PTR(PM_RUN_INST_CMPL),
-       GENERIC_EVENT_PTR(PM_BR_CMPL),
-       GENERIC_EVENT_PTR(PM_BR_MPRED_CMPL),
+       GENERIC_EVENT_PTR(PM_BR_FIN),
+       GENERIC_EVENT_PTR(PM_MPRED_BR_FIN),
        GENERIC_EVENT_PTR(PM_LD_REF_L1),
-       GENERIC_EVENT_PTR(PM_LD_MISS_L1),
+       GENERIC_EVENT_PTR(PM_LD_DEMAND_MISS_L1_FIN),
        GENERIC_EVENT_PTR(MEM_LOADS),
        GENERIC_EVENT_PTR(MEM_STORES),
        CACHE_EVENT_PTR(PM_LD_MISS_L1),
@@ -259,10 +262,10 @@ static int power10_get_alternatives(u64 event, unsigned 
int flags, u64 alt[])
 static int power10_generic_events[] = {
        [PERF_COUNT_HW_CPU_CYCLES] =                    PM_RUN_CYC,
        [PERF_COUNT_HW_INSTRUCTIONS] =                  PM_RUN_INST_CMPL,
-       [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] =           PM_BR_CMPL,
-       [PERF_COUNT_HW_BRANCH_MISSES] =                 PM_BR_MPRED_CMPL,
+       [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] =           PM_BR_FIN,
+       [PERF_COUNT_HW_BRANCH_MISSES] =                 PM_MPRED_BR_FIN,
        [PERF_COUNT_HW_CACHE_REFERENCES] =              PM_LD_REF_L1,
-       [PERF_COUNT_HW_CACHE_MISSES] =                  PM_LD_MISS_L1,
+       [PERF_COUNT_HW_CACHE_MISSES] =                  
PM_LD_DEMAND_MISS_L1_FIN,
 };
 
 static u64 power10_bhrb_filter_map(u64 branch_sample_type)
-- 
1.8.3.1

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