From: Athira Rajeev <atraj...@linux.vnet.ibm.com>
By setting exclude_kernel for user space profiling, we set the
freeze bits in Monitor Mode Control Register. Due to hardware
limitation, sometimes, Sampled Instruction Address register (SIAR)
captures kernel address even when counter freeze bits are set in
Monitor Mode Control Register (MMCR2). Patch adds a check to drop
these samples at such conditions.
Signed-off-by: Athira Rajeev <atraj...@linux.vnet.ibm.com>
Signed-off-by: Madhavan Srinivasan <ma...@linux.ibm.com>
---
arch/powerpc/perf/core-book3s.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 6be0349e01ad..e675c7c8ce0e 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -2142,6 +2142,18 @@ static void record_and_restart(struct perf_event *event,
unsigned long val,
local64_set(&event->hw.period_left, left);
perf_event_update_userpage(event);
+ /*
+ * Setting exclude_kernel will only freeze the
+ * Performance Monitor counters and we may have
+ * kernel address captured in SIAR. Hence drop
+ * the kernel sample captured during user space
+ * profiling. Setting `record` to zero will also
+ * make sure event throlling is handled.
+ */
+ if (event->attr.exclude_kernel && record)
+ if (is_kernel_addr(mfspr(SPRN_SIAR)))
+ record = 0;
+
/*
* Finally record data if requested.
*/
--
2.26.2
