> On 22-Sep-2020, at 4:16 PM, Paul A. Clarke <p...@us.ibm.com> wrote:
>
> Just one nit in a comment below...
> (and this is not worthy of tags like "reviewed-by" ;-)
>
> On Mon, Sep 21, 2020 at 03:10:04AM -0400, Athira Rajeev wrote:
>> PMU counter support functions enforces event constraints for group of
>> events to check if all events in a group can be monitored. Incase of
>> event codes using PMC5 and PMC6 ( 500fa and 600f4 respectively ),
>> not all constraints are applicable, say the threshold or sample bits.
>> But current code includes pmc5 and pmc6 in some group constraints (like
>> IC_DC Qualifier bits) which is actually not applicable and hence results
>> in those events not getting counted when scheduled along with group of
>> other events. Patch fixes this by excluding PMC5/6 from constraints
>> which are not relevant for it.
>>
>> Fixes: 7ffd948 ("powerpc/perf: factor out power8 pmu functions")
>> Signed-off-by: Athira Rajeev <atraj...@linux.vnet.ibm.com>
>> ---
>
>> diff --git a/arch/powerpc/perf/isa207-common.c
>> b/arch/powerpc/perf/isa207-common.c
>> index 964437a..12153da 100644
>> --- a/arch/powerpc/perf/isa207-common.c
>> +++ b/arch/powerpc/perf/isa207-common.c
>> @@ -288,6 +288,15 @@ int isa207_get_constraint(u64 event, unsigned long
>> *maskp, unsigned long *valp)
>>
>> mask |= CNST_PMC_MASK(pmc);
>> value |= CNST_PMC_VAL(pmc);
>> +
>> + /*
>> + * PMC5 and PMC6 are used to count cycles and instructions
>> + * and these doesnot support most of the constraint bits.
>
> s/doesnot/do not/
Hi Paul,
Thanks for checking the patch and sharing the comment.
Athira
>
>> + * Add a check to exclude PMC5/6 from most of the constraints
>> + * except for ebb/bhrb.
>> + */
>> + if (pmc >= 5)
>> + goto ebb_bhrb;
>
> PC
