On Wed, Jul 22, 2020 at 01:48:22PM +0530, Srikar Dronamraju wrote: > * pet...@infradead.org <pet...@infradead.org> [2020-07-22 09:46:24]: > > > On Tue, Jul 21, 2020 at 05:08:10PM +0530, Srikar Dronamraju wrote: > > > Currently "CACHE" domain happens to be the 2nd sched domain as per > > > powerpc_topology. This domain will collapse if cpumask of l2-cache is > > > same as SMT domain. However we could generalize this domain such that it > > > could mean either be a "CACHE" domain or a "BIGCORE" domain. > > > > What's the whole smallcore vs bigcore thing? > > > > Would it make sense to have an actual overview of the various topology > > layers somewhere? Because I'm getting lost and can't really make sense > > of the code due to that. > > To quote with an example: using (Power 9) > > Power 9 is an SMT 8 core by design. However this 8 thread core can run as 2 > independent core with threads 0,2,4 and 6 acting like a core, while threads > 1,3,5,7 acting as another core. > > The firmware can decide to showcase them as 2 independent small cores or as > one big core. However the LLC (i.e last level of cache) is shared between > all the threads of the SMT 8 core. Future power chips, LLC might change, it > may be expanded to share with another SMT 8 core or it could be made > specific to SMT 4 core. > > The smt 8 core is also known as fused core/ Big core. > The smaller smt 4 core is known as small core. > > So on a Power9 Baremetal, the firmware would show up as SMT4 core. > and we have a CACHE level at SMT 8. CACHE level would be very very similar > to MC domain in X86. > > Hope this is clear.
Ooh, that thing. I thought P9 was in actual fact an SMT4 hardware part, but to be compatible with P8 it has this fused option where two cores act like a single SMT8 part. The interleaving enumeration is done due to P7 asymmetric cores, resuting in schedulers having the preference to use the lower threads. Combined that results in a P9-fused configuration using two independent full cores when there's only 2 runnable threads. Which is a subtly different story from yours. But reading your explanation, it looks like the Linux topology setup could actually unravel the fused-faux-SMT8 into two independent SMT4 parts, negating that firmware option. Anyway, a few comments just around there might be helpfull. Thanks!
