[PATCH v2 04/10] powerpc/perf: Add power10_feat to dt_cpu_ftrs

[Athira Rajeev]

From: Madhavan Srinivasan <ma...@linux.ibm.com>

Add power10 feature function to dt_cpu_ftrs.c along
with a power10 specific init() to initialize pmu sprs.

Signed-off-by: Madhavan Srinivasan <ma...@linux.ibm.com>
---
 arch/powerpc/include/asm/reg.h        |  3 +++
 arch/powerpc/kernel/cpu_setup_power.S |  7 +++++++
 arch/powerpc/kernel/dt_cpu_ftrs.c     | 26 ++++++++++++++++++++++++++
 3 files changed, 36 insertions(+)

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 21a1b2d..900ada1 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -1068,6 +1068,9 @@
 #define MMCR0_PMC2_LOADMISSTIME        0x5
 #endif
 
+/* BHRB disable bit for PowerISA v3.10 */
+#define MMCRA_BHRB_DISABLE     0x0000002000000000
+
 /*
  * SPRG usage:
  *
diff --git a/arch/powerpc/kernel/cpu_setup_power.S 
b/arch/powerpc/kernel/cpu_setup_power.S
index efdcfa7..e8b3370c 100644
--- a/arch/powerpc/kernel/cpu_setup_power.S
+++ b/arch/powerpc/kernel/cpu_setup_power.S
@@ -233,3 +233,10 @@ __init_PMU_ISA207:
        li      r5,0
        mtspr   SPRN_MMCRS,r5
        blr
+
+__init_PMU_ISA31:
+       li      r5,0
+       mtspr   SPRN_MMCR3,r5
+       LOAD_REG_IMMEDIATE(r5, MMCRA_BHRB_DISABLE)
+       mtspr   SPRN_MMCRA,r5
+       blr
diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c 
b/arch/powerpc/kernel/dt_cpu_ftrs.c
index a0edeb3..14a513f 100644
--- a/arch/powerpc/kernel/dt_cpu_ftrs.c
+++ b/arch/powerpc/kernel/dt_cpu_ftrs.c
@@ -449,6 +449,31 @@ static int __init feat_enable_pmu_power9(struct 
dt_cpu_feature *f)
        return 1;
 }
 
+static void init_pmu_power10(void)
+{
+       init_pmu_power9();
+
+       mtspr(SPRN_MMCR3, 0);
+       mtspr(SPRN_MMCRA, MMCRA_BHRB_DISABLE);
+}
+
+static int __init feat_enable_pmu_power10(struct dt_cpu_feature *f)
+{
+       hfscr_pmu_enable();
+
+       init_pmu_power10();
+       init_pmu_registers = init_pmu_power10;
+
+       cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
+       cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
+
+       cur_cpu_spec->num_pmcs          = 6;
+       cur_cpu_spec->pmc_type          = PPC_PMC_IBM;
+       cur_cpu_spec->oprofile_cpu_type = "ppc64/power10";
+
+       return 1;
+}
+
 static int __init feat_enable_tm(struct dt_cpu_feature *f)
 {
 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
@@ -638,6 +663,7 @@ struct dt_cpu_feature_match {
        {"pc-relative-addressing", feat_enable, 0},
        {"machine-check-power9", feat_enable_mce_power9, 0},
        {"performance-monitor-power9", feat_enable_pmu_power9, 0},
+       {"performance-monitor-power10", feat_enable_pmu_power10, 0},
        {"event-based-branch-v3", feat_enable, 0},
        {"random-number-generator", feat_enable, 0},
        {"system-call-vectored", feat_disable, 0},
-- 
1.8.3.1