Dan Williams <dan.j.willi...@intel.com> writes:
> On Mon, Jun 29, 2020 at 6:58 AM Aneesh Kumar K.V
> <aneesh.ku...@linux.ibm.com> wrote:
>>
>> We only support persistent memory on P8 and above. This is enforced by the
>> firmware and further checked on virtualzied platform during platform init.
>> Add WARN_ONCE in pmem flush routines to catch the wrong usage of these.
>>
>> Signed-off-by: Aneesh Kumar K.V <aneesh.ku...@linux.ibm.com>
>> ---
>> arch/powerpc/include/asm/cacheflush.h | 2 ++
>> arch/powerpc/lib/pmem.c | 2 ++
>> 2 files changed, 4 insertions(+)
>>
>> diff --git a/arch/powerpc/include/asm/cacheflush.h
>> b/arch/powerpc/include/asm/cacheflush.h
>> index 95782f77d768..1ab0fa660497 100644
>> --- a/arch/powerpc/include/asm/cacheflush.h
>> +++ b/arch/powerpc/include/asm/cacheflush.h
>> @@ -103,6 +103,8 @@ static inline void arch_pmem_flush_barrier(void)
>> {
>> if (cpu_has_feature(CPU_FTR_ARCH_207S))
>> asm volatile(PPC_PHWSYNC ::: "memory");
>> + else
>> + WARN_ONCE(1, "Using pmem flush on older hardware.");
>
> This seems too late to be making this determination. I'd expect the
> driver to fail to successfully bind default if this constraint is not
> met.
We do that in Patch 1.
-aneesh
