Binding document adding for Freescale MSI support.
Signed-off-by: Jason Jin <[EMAIL PROTECTED]>
---
Documentation/powerpc/booting-without-of.txt | 37 +++++++++++++++++++++++++-
1 files changed, 36 insertions(+), 1 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt
b/Documentation/powerpc/booting-without-of.txt
index 1d2a772..9c496f6 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -57,7 +57,10 @@ Table of Contents
n) 4xx/Axon EMAC ethernet nodes
o) Xilinx IP cores
p) Freescale Synchronous Serial Interface
- q) USB EHCI controllers
+ q) USB EHCI controllers
+ r) Freescale Display Interface Unit
+ s) Freescale on board FPGA
+ t) Freescael MSI interrupt controller
VII - Marvell Discovery mv64[345]6x System Controller chips
1) The /system-controller node
@@ -2870,6 +2873,38 @@ platforms are moved over to use the
flattened-device-tree model.
reg = <0xe8000000 32>;
};
+ t) Freescale MSI interrupt controller
+
+ Reguired properities:
+ - compatible : should be "fsl,MPIC-MSI" for 85xx/86xx cpu,
+ and "fsl,IPIC-MSI" for 83xx cpu.
+ - reg : should contain the address and the length of the shared message
+ interrupt register set.
+ - msi-available-ranges: use <start count> style section to define which
+ msi interrupt can be used in the 256 msi interrupts.
+ - interrupts : should contain the msi interrupts cascade to the host
+ interrupt controller.
+ - interrupt-parent: should be "&mpic" for 85xx/86xx cpu and "&ipic"
+ for 83xx cpu.
+
+ Example (85xx/86xx)
+ [EMAIL PROTECTED] {
+ compatible = "fsl,MPIC-MSI";
+ reg = <0x41600 0x80>;
+ msi-available-ranges = <0 0x100>;
+ interrupts = <
+ 0xb0 0
+ 0xb1 0
+ 0xb2 0
+ 0xb3 0
+ 0xb4 0
+ 0xb5 0
+ 0xb6 0
+ 0xb7 0>;
+ interrupt-parent = <&mpic>;
+ };
+
+
VII - Marvell Discovery mv64[345]6x System Controller chips
===========================================================
--
1.5.4
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