Alistair Popple <alist...@popple.id.au> writes: > POWER10 introduces two new architectural features - ISAv3.1 and matrix > multiply accumulate (MMA) instructions. Userspace detects the presence > of these features via two HWCAP bits introduced in this patch. These > bits have been agreed to by the compiler and binutils team.
Do we have an explanation of why we're exposing MMA separately. I believe it's because ISA v3.1 says that MMA is optional, in the table on page ix? cheers > diff --git a/arch/powerpc/include/uapi/asm/cputable.h > b/arch/powerpc/include/uapi/asm/cputable.h > index 540592034740..2692a56bf20b 100644 > --- a/arch/powerpc/include/uapi/asm/cputable.h > +++ b/arch/powerpc/include/uapi/asm/cputable.h > @@ -50,6 +50,8 @@ > #define PPC_FEATURE2_DARN 0x00200000 /* darn random number insn */ > #define PPC_FEATURE2_SCV 0x00100000 /* scv syscall */ > #define PPC_FEATURE2_HTM_NO_SUSPEND 0x00080000 /* TM w/out suspended state > */ > +#define PPC_FEATURE2_ARCH_3_1 0x00040000 /* ISA 3.1 */ > +#define PPC_FEATURE2_MMA 0x00020000 /* Matrix Multiply > Accumulate */ > > /* > * IMPORTANT! > -- > 2.20.1
