Instead of having separate macros for MASK and SHIFT, and using
them to derive the bits, let's have simple macro to do the job.
Also, remove ISA207_ prefix because some of the SIER bits which
are extracted with these macros are not defined in ISA, example
DATA_SRC bits.

Signed-off-by: Ravi Bangoria <ravi.bango...@linux.ibm.com>
---
 arch/powerpc/perf/isa207-common.c |  8 ++++----
 arch/powerpc/perf/isa207-common.h | 11 +++--------
 2 files changed, 7 insertions(+), 12 deletions(-)

diff --git a/arch/powerpc/perf/isa207-common.c 
b/arch/powerpc/perf/isa207-common.c
index 4c86da5eb28a..07026bbd292b 100644
--- a/arch/powerpc/perf/isa207-common.c
+++ b/arch/powerpc/perf/isa207-common.c
@@ -215,10 +215,10 @@ void isa207_get_mem_data_src(union perf_mem_data_src 
*dsrc, u32 flags,
        }
 
        sier = mfspr(SPRN_SIER);
-       val = (sier & ISA207_SIER_TYPE_MASK) >> ISA207_SIER_TYPE_SHIFT;
+       val = SIER_TYPE(sier);
        if (val == 1 || val == 2) {
-               idx = (sier & ISA207_SIER_LDST_MASK) >> ISA207_SIER_LDST_SHIFT;
-               sub_idx = (sier & ISA207_SIER_DATA_SRC_MASK) >> 
ISA207_SIER_DATA_SRC_SHIFT;
+               idx = SIER_LDST(sier);
+               sub_idx = SIER_DATA_SRC(sier);
 
                dsrc->val = isa207_find_source(idx, sub_idx);
                dsrc->val |= (val == 1) ? P(OP, LOAD) : P(OP, STORE);
@@ -231,7 +231,7 @@ void isa207_get_mem_weight(u64 *weight)
        u64 exp = MMCRA_THR_CTR_EXP(mmcra);
        u64 mantissa = MMCRA_THR_CTR_MANT(mmcra);
        u64 sier = mfspr(SPRN_SIER);
-       u64 val = (sier & ISA207_SIER_TYPE_MASK) >> ISA207_SIER_TYPE_SHIFT;
+       u64 val = SIER_TYPE(sier);
 
        if (val == 0 || val == 7)
                *weight = 0;
diff --git a/arch/powerpc/perf/isa207-common.h 
b/arch/powerpc/perf/isa207-common.h
index 63fd4f3f6013..7027eb9f3e40 100644
--- a/arch/powerpc/perf/isa207-common.h
+++ b/arch/powerpc/perf/isa207-common.h
@@ -202,14 +202,9 @@
 #define MAX_ALT                                2
 #define MAX_PMU_COUNTERS               6
 
-#define ISA207_SIER_TYPE_SHIFT         15
-#define ISA207_SIER_TYPE_MASK          (0x7ull << ISA207_SIER_TYPE_SHIFT)
-
-#define ISA207_SIER_LDST_SHIFT         1
-#define ISA207_SIER_LDST_MASK          (0x7ull << ISA207_SIER_LDST_SHIFT)
-
-#define ISA207_SIER_DATA_SRC_SHIFT     53
-#define ISA207_SIER_DATA_SRC_MASK      (0x7ull << ISA207_SIER_DATA_SRC_SHIFT)
+#define SIER_DATA_SRC(sier)            (((sier) >> (63 - 10)) & 0x7ull)
+#define SIER_TYPE(sier)                        (((sier) >> (63 - 48)) & 0x7ull)
+#define SIER_LDST(sier)                        (((sier) >> (63 - 62)) & 0x7ull)
 
 #define P(a, b)                                PERF_MEM_S(a, b)
 #define PH(a, b)                       (P(LVL, HIT) | P(a, b))
-- 
2.21.1

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