Hello all, Great news: Aneesh sent me a patch that solves the problem on my G5 Quad :-)
I don't know whether he considers it a 'workaround' or if it's the 'proper' patch for upstream, so beware. It's a one-liner so I attach it to this message: those affected can test it as well to confirm if that indeed solves the problem for them as well. If it is the 'proper' patch, I expect it should get into upstream pretty quickly. Then Debian should be able to trivially backport it to their PPC64 kernel, and the G5 will still be a great machine in 2020! Thanks everyone for your help in tracking down the bug & to Aneesh for finding a fix :-) Cordially, -- Romain Dolbeau
diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h b/arch/powerpc/include/asm/book3s/64/mmu-hash.h index 15b75005bc34..516db8a2e6ca 100644 --- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h +++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h @@ -601,7 +601,7 @@ extern void slb_set_size(u16 size); */ #define MAX_USER_CONTEXT ((ASM_CONST(1) << CONTEXT_BITS) - 2) #define MIN_USER_CONTEXT (MAX_KERNEL_CTX_CNT + MAX_VMALLOC_CTX_CNT + \ - MAX_IO_CTX_CNT + MAX_VMEMMAP_CTX_CNT) + MAX_IO_CTX_CNT + MAX_VMEMMAP_CTX_CNT + 1) /* * For platforms that support on 65bit VA we limit the context bits */
