> dcfg use little endian that SoC register value will be correct
>
> Signed-off-by: Yinbo Zhu <yinbo....@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
This patch is still missing. Any news?
Tested-by: Michael Walle <mich...@walle.cc>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> index b0d4f8916ede..5538e8e354b2 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> @@ -162,7 +162,7 @@
> dcfg: syscon@1e00000 {
> compatible = "fsl,ls1028a-dcfg", "syscon";
> reg = <0x0 0x1e00000 0x0 0x10000>;
> - big-endian;
> + little-endian;
> };
>
> scfg: syscon@1fc0000 {
> --
> 2.17.1
>
