Hi Dave, On Thu, Nov 21, 2019 at 8:51 AM Dave Young <dyo...@redhat.com> wrote: > > On 11/11/19 at 01:31pm, Bhupesh Sharma wrote: > > Changes since v3: > > ---------------- > > - v3 can be seen here: > > http://lists.infradead.org/pipermail/kexec/2019-March/022590.html > > - Addressed comments from James and exported TCR_EL1.T1SZ in vmcoreinfo > > instead of PTRS_PER_PGD. > > - Added a new patch (via [PATCH 3/3]), which fixes a simple typo in > > 'Documentation/arm64/memory.rst' > > > > Changes since v2: > > ---------------- > > - v2 can be seen here: > > http://lists.infradead.org/pipermail/kexec/2019-March/022531.html > > - Protected 'MAX_PHYSMEM_BITS' vmcoreinfo variable under CONFIG_SPARSEMEM > > ifdef sections, as suggested by Kazu. > > - Updated vmcoreinfo documentation to add description about > > 'MAX_PHYSMEM_BITS' variable (via [PATCH 3/3]). > > > > Changes since v1: > > ---------------- > > - v1 was sent out as a single patch which can be seen here: > > http://lists.infradead.org/pipermail/kexec/2019-February/022411.html > > > > - v2 breaks the single patch into two independent patches: > > [PATCH 1/2] appends 'PTRS_PER_PGD' to vmcoreinfo for arm64 arch, whereas > > [PATCH 2/2] appends 'MAX_PHYSMEM_BITS' to vmcoreinfo in core kernel code > > (all archs) > > > > This patchset primarily fixes the regression reported in user-space > > utilities like 'makedumpfile' and 'crash-utility' on arm64 architecture > > with the availability of 52-bit address space feature in underlying > > kernel. These regressions have been reported both on CPUs which don't > > support ARMv8.2 extensions (i.e. LVA, LPA) and are running newer kernels > > and also on prototype platforms (like ARMv8 FVP simulator model) which > > support ARMv8.2 extensions and are running newer kernels. > > > > The reason for these regressions is that right now user-space tools > > have no direct access to these values (since these are not exported > > from the kernel) and hence need to rely on a best-guess method of > > determining value of 'vabits_actual' and 'MAX_PHYSMEM_BITS' supported > > by underlying kernel. > > > > Exporting these values via vmcoreinfo will help user-land in such cases. > > In addition, as per suggestion from makedumpfile maintainer (Kazu), > > it makes more sense to append 'MAX_PHYSMEM_BITS' to > > vmcoreinfo in the core code itself rather than in arm64 arch-specific > > code, so that the user-space code for other archs can also benefit from > > this addition to the vmcoreinfo and use it as a standard way of > > determining 'SECTIONS_SHIFT' value in user-land. > > > > Cc: Boris Petkov <b...@alien8.de> > > Cc: Ingo Molnar <mi...@kernel.org> > > Cc: Thomas Gleixner <t...@linutronix.de> > > Cc: Jonathan Corbet <cor...@lwn.net> > > Cc: James Morse <james.mo...@arm.com> > > Cc: Mark Rutland <mark.rutl...@arm.com> > > Cc: Will Deacon <w...@kernel.org> > > Cc: Steve Capper <steve.cap...@arm.com> > > Cc: Catalin Marinas <catalin.mari...@arm.com> > > Cc: Ard Biesheuvel <ard.biesheu...@linaro.org> > > Cc: Michael Ellerman <m...@ellerman.id.au> > > Cc: Paul Mackerras <pau...@samba.org> > > Cc: Benjamin Herrenschmidt <b...@kernel.crashing.org> > > Cc: Dave Anderson <ander...@redhat.com> > > Cc: Kazuhito Hagio <k-ha...@ab.jp.nec.com> > > Cc: x...@kernel.org > > Cc: linuxppc-dev@lists.ozlabs.org > > Cc: linux-arm-ker...@lists.infradead.org > > Cc: linux-ker...@vger.kernel.org > > Cc: linux-...@vger.kernel.org > > Cc: ke...@lists.infradead.org > > > > Bhupesh Sharma (3): > > crash_core, vmcoreinfo: Append 'MAX_PHYSMEM_BITS' to vmcoreinfo > > arm64/crash_core: Export TCR_EL1.T1SZ in vmcoreinfo > > Soft reminder: the new introduced vmcoreinfo needs documentation > > Please check Documentation/admin-guide/kdump/vmcoreinfo.rst
Sure, will send a v5 to address the same. Thanks, Bhupesh
