This removes the warnings about the fact that the 4 pci bridges (i.e.
the 4 pci hosts) don't have any ranges.

Signed-off-by: Valentin Longchamp <valen...@longchamp.me>
---
 arch/powerpc/boot/dts/fsl/kmcent2.dts | 36 +++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/powerpc/boot/dts/fsl/kmcent2.dts 
b/arch/powerpc/boot/dts/fsl/kmcent2.dts
index 48b7f9797124..5731928e9264 100644
--- a/arch/powerpc/boot/dts/fsl/kmcent2.dts
+++ b/arch/powerpc/boot/dts/fsl/kmcent2.dts
@@ -258,14 +258,50 @@
 
        pci1: pcie@ffe250000 {
                status = "disabled";
+               reg = <0xf 0xfe250000 0 0x10000>;
+               ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000
+                         0x01000000 0 0 0xf 0xf8010000 0 0x00010000>;
+               pcie@0 {
+                       ranges = <0x02000000 0 0xe0000000
+                                 0x02000000 0 0xe0000000
+                                 0 0x10000000
+
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00010000>;
+               };
        };
 
        pci2: pcie@ffe260000 {
                status = "disabled";
+               reg = <0xf 0xfe260000 0 0x10000>;
+               ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
+                         0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
+               pcie@0 {
+                       ranges = <0x02000000 0 0xe0000000
+                                 0x02000000 0 0xe0000000
+                                 0 0x10000000
+
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00010000>;
+               };
        };
 
        pci3: pcie@ffe270000 {
                status = "disabled";
+               reg = <0xf 0xfe270000 0 0x10000>;
+               ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000
+                         0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
+               pcie@0 {
+                       ranges = <0x02000000 0 0xe0000000
+                                 0x02000000 0 0xe0000000
+                                 0 0x10000000
+
+                                 0x01000000 0 0x00000000
+                                 0x01000000 0 0x00000000
+                                 0 0x00010000>;
+               };
        };
 
        qe: qe@ffe140000 {
-- 
2.17.1

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