On Wed, 2 Oct 2019, Leonardo Bras wrote: > + > +inline unsigned long __begin_lockless_pgtbl_walk(struct mm_struct *mm, > + bool disable_irq) > +{ > + unsigned long irq_mask = 0; > + > + if (IS_ENABLED(CONFIG_LOCKLESS_PAGE_TABLE_WALK_TRACKING)) > + atomic_inc(&mm->lockless_pgtbl_walkers); > + You are creating contention on a single exclusive cacheline. Doesnt this defeat the whole purpose of the lockless page table walk? Use mmap_sem or so should cause the same performance regression?
- [PATCH v5 00/11] Introduces new count-based method for... Leonardo Bras
- [PATCH v5 02/11] powerpc/mm: Adds counting method... Leonardo Bras
- Re: [PATCH v5 02/11] powerpc/mm: Adds countin... Christopher Lameter
- Re: [PATCH v5 02/11] powerpc/mm: Adds cou... Leonardo Bras
- Re: [PATCH v5 02/11] powerpc/mm: Adds... Christopher Lameter
- Re: [PATCH v5 02/11] powerpc/mm:... Leonardo Bras
- Re: [PATCH v5 02/11] powerpc... Christopher Lameter
- [PATCH v5 03/11] mm/gup: Applies counting method ... Leonardo Bras
- [PATCH v5 01/11] asm-generic/pgtable: Adds generi... Leonardo Bras
- Re: [PATCH v5 01/11] asm-generic/pgtable: Add... Peter Zijlstra
- Re: [PATCH v5 01/11] asm-generic/pgtable:... Peter Zijlstra
- Re: [PATCH v5 01/11] asm-generic/pgta... John Hubbard
- Re: [PATCH v5 01/11] asm-generic... Peter Zijlstra