This is a note to let you know that I've just added the patch titled
powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB
to the 5.2-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
powerpc-allow-flush_-inval_-dcache_range-to-work-across-ranges-4gb.patch
and it can be found in the queue-5.2 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <sta...@vger.kernel.org> know about it.
>From alast...@au1.ibm.com Tue Aug 27 08:18:42 2019
From: "Alastair D'Silva" <alast...@au1.ibm.com>
Date: Wed, 21 Aug 2019 10:19:27 +1000
Subject: powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB
To: alast...@d-silva.org
Cc: sta...@vger.kernel.org, Benjamin Herrenschmidt <b...@kernel.crashing.org>,
Paul Mackerras <pau...@samba.org>, Michael Ellerman <m...@ellerman.id.au>,
Thomas Gleixner <t...@linutronix.de>, Greg Kroah-Hartman
<gre...@linuxfoundation.org>, Allison Randal <alli...@lohutok.net>,
linuxppc-dev@lists.ozlabs.org, linux-ker...@vger.kernel.org
Message-ID: <20190821001929.4253-1-alast...@au1.ibm.com>
From: Alastair D'Silva <alast...@d-silva.org>
The upstream commit:
22e9c88d486a ("powerpc/64: reuse PPC32 static inline flush_dcache_range()")
has a similar effect, but since it is a rewrite of the assembler to C, is
too invasive for stable. This patch is a minimal fix to address the issue in
assembler.
This patch applies cleanly to v5.2, v4.19 & v4.14.
When calling flush_(inval_)dcache_range with a size >4GB, we were masking
off the upper 32 bits, so we would incorrectly flush a range smaller
than intended.
This patch replaces the 32 bit shifts with 64 bit ones, so that
the full size is accounted for.
Signed-off-by: Alastair D'Silva <alast...@d-silva.org>
Acked-by: Michael Ellerman <m...@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gre...@linuxfoundation.org>
---
arch/powerpc/kernel/misc_64.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -130,7 +130,7 @@ _GLOBAL_TOC(flush_dcache_range)
subf r8,r6,r4 /* compute length */
add r8,r8,r5 /* ensure we get enough */
lwz r9,DCACHEL1LOGBLOCKSIZE(r10) /* Get log-2 of dcache block
size */
- srw. r8,r8,r9 /* compute line count */
+ srd. r8,r8,r9 /* compute line count */
beqlr /* nothing to do? */
mtctr r8
0: dcbst 0,r6
@@ -148,7 +148,7 @@ _GLOBAL(flush_inval_dcache_range)
subf r8,r6,r4 /* compute length */
add r8,r8,r5 /* ensure we get enough */
lwz r9,DCACHEL1LOGBLOCKSIZE(r10)/* Get log-2 of dcache block size */
- srw. r8,r8,r9 /* compute line count */
+ srd. r8,r8,r9 /* compute line count */
beqlr /* nothing to do? */
sync
isync
Patches currently in stable-queue which might be from alast...@au1.ibm.com are
queue-5.2/powerpc-allow-flush_-inval_-dcache_range-to-work-across-ranges-4gb.patch
