[PATCH v3 1/6] fsl/fman: don't touch liodn base regs reserved on non-PAMU SoCs

[laurentiu . tudor]

From: Laurentiu Tudor <laurentiu.tu...@nxp.com>

liodn base registers are specific to PAMU based NXP systems and on SMMU
based ones are reserved. Don't access them if PAMU is compiled in.

Signed-off-by: Laurentiu Tudor <laurentiu.tu...@nxp.com>
---
 drivers/net/ethernet/freescale/fman/fman.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/freescale/fman/fman.c 
b/drivers/net/ethernet/freescale/fman/fman.c
index e80fedb27cee..cce6636b1763 100644
--- a/drivers/net/ethernet/freescale/fman/fman.c
+++ b/drivers/net/ethernet/freescale/fman/fman.c
@@ -634,6 +634,9 @@ static void set_port_liodn(struct fman *fman, u8 port_id,
 {
        u32 tmp;
 
+       iowrite32be(liodn_ofst, &fman->bmi_regs->fmbm_spliodn[port_id - 1]);
+       if (!IS_ENABLED(CONFIG_FSL_PAMU))
+               return;
        /* set LIODN base for this port */
        tmp = ioread32be(&fman->dma_regs->fmdmplr[port_id / 2]);
        if (port_id % 2) {
@@ -644,7 +647,6 @@ static void set_port_liodn(struct fman *fman, u8 port_id,
                tmp |= liodn_base << DMA_LIODN_SHIFT;
        }
        iowrite32be(tmp, &fman->dma_regs->fmdmplr[port_id / 2]);
-       iowrite32be(liodn_ofst, &fman->bmi_regs->fmbm_spliodn[port_id - 1]);
 }
 
 static void enable_rams_ecc(struct fman_fpm_regs __iomem *fpm_rg)
@@ -1942,6 +1944,8 @@ static int fman_init(struct fman *fman)
 
                fman->liodn_offset[i] =
                        ioread32be(&fman->bmi_regs->fmbm_spliodn[i - 1]);
+               if (!IS_ENABLED(CONFIG_FSL_PAMU))
+                       continue;
                liodn_base = ioread32be(&fman->dma_regs->fmdmplr[i / 2]);
                if (i % 2) {
                        /* FMDM_PLR LSB holds LIODN base for odd ports */
-- 
2.17.1