On Thu, 2008-03-27 at 20:02 +0900, Ishizaki Kou wrote: > > > I'll try to have a closer look next week, but I'm a bit worried by > > having all IO go through 2 level of function pointers, the PPE isn't > > very good at it and this will slow things down more than they > already > > are. > > Only on celleb, all IO go through 2 level of function pointers. > > On cell blades, you can set global variable "ppc_pci_io" up at > function > spider_pci_workaround_init() directly instead of calling function > io_workaround_init(), so all IO on cell blades use only one level of > function pointer which is stored in ppc_pci_io.
But I would probably want to also use the PCI Express stuff for cell blades... > As you said, if read/write/in/out functions take device parameter, > taking I/O function pointers into the dev_archdata structure should be > the best solution. But they don't take device parameter, and they must > search I/O function pointers with address parameter. I think it's > better they search pointers from bus bridges, because access mothod > for a device on its parent bus bridge, not device itself. What I meant is that if the pointers are in dev_archdata, we can populate with a different set of pointers for PCI vs. PCI-E. Ben. _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
