Hello Daniel,
On Thu, Apr 4, 2019 at 3:52 PM Daniel Lezcano <daniel.lezc...@linaro.org> wrote:
>
>
> Hi Abhishek,
>
> thanks for taking the time to test the different scenario and give us
> the numbers.
>
> On 01/04/2019 07:11, Abhishek wrote:
> >
[.. snip..]
>
> >>>> In case of POWER, this is problematic, when the predicted state in the
> >>>> aforementioned scenario is a lite stop state, as such lite states will
> >>>> inhibit SMT folding, thereby depriving the other threads in the core
> >>>> from
> >>>> using the core resources.
>
> I can understand an idle state can prevent other threads to use the core
> resources. But why a deeper idle state does not prevent this also?
On POWER9, we have the following classes of platform idle states
(called stop states)
lite : These do not lose any context including the user context. In
this state
GPRs are also preserved (stop0_lite)
shallow : These lose user context,but not the hypervisor context. So
GPRs are lost but
not SPRs. (stop0, stop1, stop2)
deep: These lose hypervisor context. (stop4, stop5)
In the case of lite stop state, only instruction dispatch on the CPU thread
is paused. The thread does not give up its registers set in this state for the
use of its busy sibling threads in the core. Hence, SMT folding does not
happen in this state.
With respect to shallow and deep states, not only is the instruction dispatch
paused, it also gives up its registers set for the other siblings to use
These stop states are beneficial for SMT folding.
Hence, if a CPU thread remains in a lite state for too long,
its siblings in the core would not be able to utilize the full resources
of the core for that duration, thereby inhibiting single
thread performance. This is not the case with non-lite states.
--
Thanks and Regards
gautham.
