The following patch allows interrupts to occur on the
sbc8548. Currently PCI and PCI-X devices get assigned an IRQ
but the interrupt count never increases. This solves the
problem and adds PCI support as well.
Signed-off-by: Jeremy McNicoll <[EMAIL PROTECTED]>
Signed-off-by: Paul Gortmaker <[EMAIL PROTECTED]>
---
arch/powerpc/boot/dts/sbc8548.dts | 16 +++++++++++-----
1 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/boot/dts/sbc8548.dts
b/arch/powerpc/boot/dts/sbc8548.dts
index 14be38a..b86e65d 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -184,11 +184,17 @@
cell-index = <0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
- /* IDSEL 0x01 (PCI-X slot) */
- 0x0800 0x0 0x0 0x1 &mpic 0x0 0x1
- 0x0800 0x0 0x0 0x2 &mpic 0x1 0x1
- 0x0800 0x0 0x0 0x3 &mpic 0x2 0x1
- 0x0800 0x0 0x0 0x4 &mpic 0x3 0x1>;
+ /* IDSEL 0x01 (PCI-X slot) @66MHz */
+ 0x0800 0x0 0x0 0x1 &mpic 0x2 0x1
+ 0x0800 0x0 0x0 0x2 &mpic 0x3 0x1
+ 0x0800 0x0 0x0 0x3 &mpic 0x4 0x1
+ 0x0800 0x0 0x0 0x4 &mpic 0x1 0x1
+
+ /* IDSEL 0x11 (PCI, 3.3V 32bit) @33MHz */
+ 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
+ 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
+ 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
+ 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1>;
interrupt-parent = <&mpic>;
interrupts = <0x18 0x2>;
--
1.5.3.7
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