On Tue, 6 Nov 2018 23:37:09 +1100
Michael Ellerman <m...@ellerman.id.au> wrote:
> The slbfee instruction was only added in ISA 2.05 (Power6), it's not
> supported on older CPUs. We don't have a CPU feature for that ISA
> version though, so just use the ISA 2.06 feature flag.
>
> Fixes: e15a4fea4dee ("powerpc/64s/hash: Add some SLB debugging tests")
> Signed-off-by: Michael Ellerman <m...@ellerman.id.au>
Ugh, thank for fixing all that up. Looks good.
Thanks,
Nick
> ---
> arch/powerpc/mm/slb.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c
> index 457fd29448b1..b663a36f9ada 100644
> --- a/arch/powerpc/mm/slb.c
> +++ b/arch/powerpc/mm/slb.c
> @@ -66,6 +66,9 @@ static void assert_slb_presence(bool present, unsigned long
> ea)
>
> WARN_ON_ONCE(mfmsr() & MSR_EE);
>
> + if (!cpu_has_feature(CPU_FTR_ARCH_206))
> + return;
> +
> asm volatile(__PPC_SLBFEE_DOT(%0, %1) : "=r"(tmp) : "r"(ea) : "cr0");
>
> WARN_ON(present == (tmp == 0));
> --
> 2.17.2
>
