On Wed, 2018-09-05 at 18:40 +0300, Sergey Miroshnichenko wrote: > PowerNV doesn't depend on PCIe topology info from DT anymore, and now > it is able to enumerate the fabric and assign the bus numbers.
No it's not, at least unless we drop P7 support. P7 has constraints on the bus ranges being aligned power-of-two for the PE assignment to work, which is why we have to honor the firmware provided numbers. Additionally, this breaks the mapping between the firmware idea of the bus numbers and Linux idea. This will probably break all of the SR-IOV stuff. Now we should probably fix it all by removing the FW bits completely and doing it all from Linux, though we really need to better handle how we deal with the segmented MMIO space. I would also be weary of what other parts of the code depends on that matching between the FW bdfn and the Linux bdfn. Cheers, Ben. > Signed-off-by: Sergey Miroshnichenko <s.miroshniche...@yadro.com> > --- > arch/powerpc/platforms/powernv/pci.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/powerpc/platforms/powernv/pci.c > b/arch/powerpc/platforms/powernv/pci.c > index 6d4280086a08..f6eaca3123cd 100644 > --- a/arch/powerpc/platforms/powernv/pci.c > +++ b/arch/powerpc/platforms/powernv/pci.c > @@ -1104,6 +1104,7 @@ void __init pnv_pci_init(void) > struct device_node *np; > > pci_add_flags(PCI_CAN_SKIP_ISA_ALIGN); > + pci_add_flags(PCI_REASSIGN_ALL_BUS); > > /* If we don't have OPAL, eg. in sim, just skip PCI probe */ > if (!firmware_has_feature(FW_FEATURE_OPAL))
