On Wed, Mar 28, 2018 at 09:01:27PM +1100, Benjamin Herrenschmidt wrote:
> On Wed, 2018-03-28 at 11:55 +0200, Arnd Bergmann wrote:
> > > powerpc and ARM can't quite make them synchronous I think, but at least
> > > they should have the same semantics as writel.
> >
> > One thing that ARM does IIRC is that it only guarantees to order writel()
> > within
> > one device, and the memory mapped PCI I/O space window almost certainly
> > counts as a separate device to the CPU.
>
> That sounds bogus.
To elaborate, if you do the following on arm:
writel(DEVICE_FOO);
writel(DEVICE_BAR);
we generally cannot guarantee in which order those accesses will hit the
devices even if we add every barrier under the sun. You'd need something
in between, specific to DEVICE_FOO (probably a read-back) to really push
the first write out. This doesn't sound like it would be that uncommon to
me.
On the other hand:
writel(DEVICE_FOO);
writel(DEVICE_FOO);
is obviously ordered and also things like:
writel(DEVICE_FOO_IN_PCI_MEM_SPACE);
writel(DEVICE_BAR_IN_SAME_PCI_MEM_SPACE);
are ordered up to the PCI host bridge, because that's really the "device"
here.
Will
